The present invention relates to a method for fabricating a semiconductor photodetector. More particularly, the invention relates to a method for fabricating a semiconductor photodetector element composed of a single SIT (Static Induction Transistor) or a plurality of such transistors formed in an array.
The present inventors have developed a semiconductor imaging device which includes pixels constituted each by a single SIT which performs both a photodetecting function and a switching function. Such a device is disclosed in Japanese Patent Application Nos. 204656/1981 and 157693/1982 filed on Dec. 17, 1981 and Sept. 9, 1982, respectively.
The SIT constituting the semiconductor image device includes an n.sup.+ type drain region 3, a p.sup.+ type control gate region 4 and a p.sup.+ type shielding gate region 5, which are formed in an n.sup.- type epitaxial layer 2 formed on an n.sup.+ type Si substrate 1 as shown in FIG. 1. The p.sup.+ type shielding gate region 5 is formed such that it surrounds the n.sup.+ type drain region 3 and the p.sup.+ type control gate region 4 and functions to isolate them from adjacent pixels by means of a depletion layer.
The n.sup.+ type substrate 1 forms a source region which is common to all of the pixels formed therein. A drain electrode 8 is connected to the n.sup.+ type drain region 3 and a source electrode 10 is connected to the source region 1. A control gate electrode 9 is connected through a gate capacitor formed by a gate insulating layer 7 to the control gate region 4.
The SIT pixel formed as described above includes a vertical SIT 20 and a gate capacitor 21 formed between the electrodes 8, 9 and 10 as shown in FIG. 2. The source electrode 10 is grounded, the control gate electrode 9 receives a readout pulse signal .0..sub.G and the drain electrode 8 is connected through a switch 22, which is turned on upon receipt of a pulse of a video line selection signal .0..sub.S, to a biasing circuit 23 and a readout terminal 24.
When the SIT pixel is irradiated with light under a biased condition, electron-hole pairs are produced around the control gate region 4. Electrons of these pairs flow into the source electrode 10 where they are collected. On the other hand, holes are accumulated in the control gate region 4, which forms a floating electrode of capacitor 21.
The SIT is still in a nonconductive state, even when a large number of holes has been accumulated. When a positive pulse of the gate signal .0..sub.G is supplied through the gate capacitor 21, the barrier potential of the true gate is lowered, causing a current to flow through the SIT 20, with the magnitude of the current being dependent on the amount of holes accumulated in the control gate region 4, that is, by the amount of light falling on the SIT pixel. The current value is read out at a terminal 24 as a video signal.
In the above described SIT structure, the p.sup.+ type shielding gate region 5 functions to separate electrostatically the adjacent pixels from one another. In this case, it may be possible to use the n.sup.+ type regions 3 and 1 as the source region and the drain region, respectively.
An imaging device composed of an array of such SITs having a common shielding gate region is much simpler in structure than a conventional imaging device constituted by pixels each having both a diode for photodetection and an MOS transistor for switching because the SIT performs the photodetection function as well as the switching function. Therefore, it becomes possible to substantially increase the integration density of the circuit. Furthermore, an imaging device composed of an array of SITs having a common shielding gate region exhibits a very high photodetectivity and has no switching noise, which is inherent to the MOS device. Although the imaging device disclosed in Japanese Patent Applications Nos. 204656/1982 and 157693/1982 is constituted with a two-dimensional array of SITs having a common shielding gate region, it is possible to form an imaging device with one-dimensionally arranged SITs having a common shielding gate region. It is, of course, possible to use a single SIT as a photoelectric converter. Therefore, it should be noted that, as used herein, the term "photodetector" means inclusively a photoelectric converter constituted by a single SIT and an imaging device constituted by a plurality of SITs arranged in an array with a common shielding gate region.
A photodetector composed of an SIT or multiple SITs performing both a photodetecting function and a switching function has been proposed as a substitute for the conventional MOS type photodetector. However, the development of SIT photodetectors at present is still in the initial stages, and effective methods for fabricating an SIT photodetector have not heretofore been available.
Furthermore, in the above-described SIT having a drain region between the control and shielding gate regions, the positional relations between the drain (source) region 3 and the control gate region 4 and between the region 4 and the shielding gate region 5 strongly affect various characteristics of the SIT. For example, as disclosed in Japanese Patent Application No. 157693/1982, it is possible to improve the photosensitivity of a device of this type by forming the drain (source) region 3 closer to the shielding gate region 5. Therefore, in fabricating a photodetector using a SIT or SITs, it is very important to form the drain (source) region, the control gate region and the shielding gate region with a high precision, while maintaining the relative positions thereof exactly.